内存模型

Java

每个线程自己的内存是个虚拟的概念，没有真实的存在，都是从cpu cache上读取的。主要是由指令重排序导致的。

学习资料

https://www.jianshu.com/p/6745203ae1fe
https://www.jianshu.com/p/d3fda02d4cae

概括一下:
可见性是通过MESI协议解决的，但是MESI协议本身store buffer的存在，导致其无法强一致，必须再借助内存屏障
而指令重排完全借助内存屏障实现

MESI协议

The MESI protocol doesn't allow more than one caches to keep the same cache line in a modified state. So, if one cache line is modified and wants to be read from other processor´s cache, then it must be first written to main memory and then read, so that both processor´s caches now share that line (shared state)

两个不同的概念

MESI协议解决的是Cache coherence的问题。

Cache coherence vs Memory consistency

Cache coherence means that all the processors see the same data for a
particular memory address as they should have if there were no caches
in the system. Cache coherence ensures that the system returns the
exactly same data from memory as it would have if no caches were
present. If Processor 1 first writes to Mem[A] and then Processor 2
reads from Mem[A], the Processor 2 should get the new data written in
Mem[A] by Processor 1. Cache coherence is a microarchitectural feature
and the programmer doesn't need to know about it. Different cache
coherence policy can be employed like, Modified-Shared-Invalid(MSI) ,
Modified-Shared-Invalid-Exclusive (MESI),
Modified-Shared-Invalid-Exclusive-Owner (MOESI), however this would
only have an impact on the performance of the system and not on the
result.

Memory consistency on the other hand, ensures that all the memory
instructions appear to execute in the program order. Memory
consistency defines, how all the memory instructions in a
multi-processor system will be ordered. Memory consistency is a
architectural feature which is known to the programmer. Different
memory consistencies like sequential consistency, relaxed consistency
etc, and might have an impact on the final program result.